Microprocessor and Computer Architecture
Introduction to Microprocessor
Microprocessor evolution, types, architecture overview, basic components, and terminology.
- Definition and basic structure
- Evolution of microprocessors (4-bit to 64-bit)
- Classification based on architecture (RISC vs CISC)
- Applications of microprocessors
- Comparison with microcontrollers
- ALU, control unit, registers
- System bus (address, data, control)
- Clock speed and instruction cycle
- Word size and data bus width
- Memory and I/O interfacing basics
8085 Microprocessor
8085 architecture, registers, pin diagram, instruction set, addressing modes, timing diagram, and interrupts.
- Block diagram and pin diagram
- Register organization (accumulator, flags)
- Flag register (Sign, Zero, Auxiliary Carry, Parity, Carry)
- Stack pointer and program counter
- Address and data bus multiplexing
- Data transfer instructions (MOV, MVI, LDA, STA)
- Arithmetic instructions (ADD, SUB, INR, DCR)
- Logical instructions (ANA, ORA, XRA, CMP)
- Branch instructions (JMP, JZ, JNZ, CALL, RET)
- Addressing modes (direct, register, immediate, indirect)
- Instruction cycle, machine cycle, T-states
- Timing diagrams for opcode fetch, memory read/write
- Interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5, INTR
- Interrupt service routine
- SIM and RIM instructions
8086 Microprocessor
8086 architecture, register organization, memory segmentation, pin diagram, instruction set, and addressing modes.
- Block diagram and pin diagram
- Bus interface unit (BIU) and execution unit (EU)
- Register organization (general, segment, pointer, index)
- Memory segmentation (code, data, stack, extra)
- Physical address generation
- Data transfer instructions (MOV, PUSH, POP, XCHG)
- Arithmetic and logical instructions
- String instructions (MOVS, CMPS, SCAS)
- Addressing modes (register, immediate, direct, indexed, based)
- Branch and loop instructions
- Assembly language syntax
- Assembler directives (DB, DW, DD, EQU, SEGMENT)
- Writing simple programs
- Debugging techniques
- DOS and BIOS interrupts
Basic Computer Architecture and Design
Von Neumann and Harvard architectures, CPU components, bus systems, instruction cycle, and performance metrics.
- Von Neumann architecture
- Harvard architecture
- Comparison of architectures
- CPU organization and components
- Instruction set architecture (ISA)
- System bus types (address, data, control)
- Bus arbitration
- Bus standards (PCI, USB, SATA)
- Performance metrics (MIPS, FLOPS, CPI)
- Amdahl's law
- Fetch-decode-execute cycle
- Micro-operations
- Hardwired vs microprogrammed control
- Instruction pipelining basics
- Performance improvement techniques
Microprogrammed Control Unit
Hardwired vs microprogrammed control, control memory, address sequencing, microinstruction format, and nano-programming.
- Hardwired control unit
- Microprogrammed control unit
- Control memory organization
- Address sequencing
- Comparison of control unit types
- Microinstruction format
- Horizontal vs vertical microinstructions
- Nanoprogramming
- Control store organization
- Microprogram sequencer
Central Processing Unit
ALU design, register set, instruction formats, addressing modes, RISC vs CISC, and stack organization.
- Arithmetic logic unit structure
- Addition and subtraction circuits
- Multiplication algorithms (Booth's)
- Division algorithms
- Floating-point unit
- General purpose registers
- Special purpose registers
- Accumulator-based architecture
- Register-memory architecture
- Stack organization
- Instruction formats (fixed, variable)
- Addressing modes
- RISC vs CISC characteristics
- Register windowing
- Instruction encoding
Computer Arithmetic
Addition, subtraction, multiplication, division algorithms, floating-point arithmetic, and IEEE 754 standard.
- Addition and subtraction algorithms
- Booth's multiplication algorithm
- Restoring and non-restoring division
- Carry look-ahead adder
- Ripple carry adder
- Floating-point representation
- IEEE 754 standard (single and double precision)
- Floating-point addition and subtraction
- Floating-point multiplication and division
- Normalization and rounding
Input and Output Organization and Memory Organization
I/O interfacing, interrupt handling, DMA, memory hierarchy, cache memory, virtual memory, and memory mapping.
- I/O interfaces and controllers
- Programmed I/O
- Interrupt-driven I/O
- Direct memory access (DMA)
- I/O processors
- Memory hierarchy
- Cache memory (direct, associative, set-associative)
- Virtual memory and paging
- Memory management unit (MMU)
- Secondary storage organization
Pipelining
Pipeline concepts, hazards, data forwarding, branch prediction, superscalar processors, and multi-core architectures.
- Instruction pipeline basics
- Pipeline stages (fetch, decode, execute, memory, write-back)
- Throughput and speedup
- Pipeline hazards (structural, data, control)
- Data forwarding and bypassing
- Branch prediction techniques
- Superscalar processors
- VLIW architecture
- Multi-core processors
- Pipeline performance metrics